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Quizzes > Quizzes for Business > Technology

Digital Logic and Computer Architecture Quiz Challenge

Test Your Circuit Design and CPU Architecture Skills

Difficulty: Moderate
Questions: 20
Learning OutcomesStudy Material
Colorful paper art depicting elements related to Digital Logic and Computer Architecture Quiz

Ready to challenge your understanding of digital logic and computer architecture? This free quiz blends questions from Boolean algebra to CPU organization, making it perfect for students and professionals brushing up on fundamentals. Dive into the Computer Architecture Fundamentals Quiz for more depth or try our Propositional Logic Knowledge Test to sharpen your circuit reasoning. All questions are fully editable - tweak them in our editor to suit course needs. Explore more quizzes and take the next step in mastering system design today.

What is the output of a two-input AND gate when inputs are A=1 and B=0?
0
1
High impedance
Undefined
An AND gate outputs 1 only if both inputs are 1. Since one input is 0, the output is 0.
What is the output of a two-input OR gate when inputs are A=0 and B=0?
0
1
High impedance
Undefined
An OR gate outputs 1 if at least one input is 1. Both inputs are 0, so the output is 0.
Simplify the Boolean expression: A + A·B = ?
A
B
A·B
A + B
By the absorption law, A + A·B simplifies to A because A covers the term A·B.
Which component of a CPU performs arithmetic and logical operations?
Arithmetic Logic Unit (ALU)
Control Unit
Register File
Cache
The ALU is specifically designed to execute arithmetic and logical operations within the processor.
Which level of memory is typically the fastest and closest to the CPU core?
Register
L1 cache
RAM
Hard disk
CPU registers are the fastest storage as they reside within the processor and provide immediate access.
What is the output of a two-input NAND gate when inputs are A=1 and B=1?
0
1
High impedance
Undefined
A NAND gate outputs the complement of the AND gate output. AND of 1 and 1 is 1, so NAND yields 0.
For the combinational circuit output = (A XOR B) AND C, what is the output if A=1, B=1, C=1?
0
1
High impedance
Undefined
XOR of 1 and 1 is 0, and 0 AND 1 remains 0, so the circuit output is 0.
Simplify the Boolean expression XY + XZ = ?
X(Y + Z)
Y + Z
X + Y + Z
XZ + YZ
By factoring X from both terms, XY + XZ becomes X(Y + Z), applying the distributive law.
Which part of the processor orchestrates the fetching, decoding, and execution of instructions?
Control Unit
ALU
Cache
Register File
The Control Unit manages the instruction cycle and coordinates the CPU's functional units.
Which term refers to the time it takes for a signal to travel through a logic gate?
Propagation delay
Setup time
Hold time
Clock skew
Propagation delay measures the time from an input change until the output responds in a logic gate.
In a JK flip-flop, when J=1 and K=0 at the clock edge, what is the next state Q?
1 (Set)
0 (Reset)
Toggle
No change
For a JK flip-flop, J=1 and K=0 causes the output to be set to 1 on the triggering clock edge.
Which cache level is usually located on the CPU die and provides the fastest access after registers?
L1 cache
L2 cache
L3 cache
Main memory
L1 cache is integrated directly on the CPU die and offers the lowest latency after registers.
Apply De Morgan's law: ¬(A + B) = ?
¬A · ¬B
¬A + ¬B
A · B
A + B
De Morgan's law states that the negation of an OR is the AND of the negations, so ¬(A+B)=¬A·¬B.
Which Boolean expression represents a 2:1 multiplexer with select S, inputs D0 and D1?
S'·D0 + S·D1
D0 + D1
S·(D0 + D1)
S' + D1
A 2:1 MUX outputs D0 when S=0 and D1 when S=1, described by S'·D0 + S·D1.
What timing parameter specifies how long an input must be stable before the clock edge?
Setup time
Hold time
Propagation delay
Contamination delay
Setup time defines the minimum interval before the clock edge during which the input must remain constant.
Using a 4-variable Karnaugh map, the function f(A,B,C,D)=Σ(0,2,5,7,8,10,13,15) simplifies to which expression?
B'·D' + C·D
A'·D' + B·C
A·C' + B·D
A'·B' + C·D'
Grouping minterms yields two prime implicants: B'·D' covering (0,2,8,10) and C·D covering (5,7,13,15).
What type of hazard occurs when an output momentarily glitches despite final stable inputs in a combinational circuit?
Static hazard
Dynamic hazard
Functional hazard
Structural hazard
A static hazard is a brief unwanted output glitch when the output should remain constant between input changes.
Given a path with clock-to-Q delay 2ns, two gate delays of 3ns and 4ns, what is the maximum clock frequency?
≈111.1 MHz
100 MHz
125 MHz
200 MHz
Total path delay is 2+3+4=9ns, so clock period ≥9ns, yielding a maximum frequency of about 1/9ns ≈111.1 MHz.
What is the primary function of a Translation Lookaside Buffer (TLB) in the memory hierarchy?
Translate virtual to physical addresses quickly
Cache frequently used data
Store page table entries permanently
Increase DRAM bandwidth
A TLB caches recent virtual-to-physical address translations to speed up memory access.
Which hazard describes when an instruction requires data before a previous instruction has written it?
Read after Write (RAW)
Write after Read (WAR)
Write after Write (WAW)
Structural hazard
A RAW hazard occurs when an instruction attempts to read a location before a previous instruction writes to it, causing a dependency.
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Learning Outcomes

  1. Analyse truth tables to determine logic gate outputs
  2. Evaluate combinational circuit designs for correctness
  3. Master fundamentals of Boolean algebra simplification
  4. Identify key components of processor architecture
  5. Apply timing analysis to sequential logic circuits
  6. Demonstrate understanding of memory hierarchy concepts

Cheat Sheet

  1. Understand basic logic gates - Logic gates like AND, OR, and NOT are the DNA of all digital circuits: AND lights up only when both inputs are true, OR buzzes if at least one input is on, and NOT flips a signal on its head. Getting these fundamentals down will make every higher-level concept fall into place. GeeksforGeeks: Boolean Algebra Basics
  2. Analyze truth tables - A truth table lists every possible input combination and shows what the output will be, so it's like a cheat-sheet for circuit behavior. Practice creating and interpreting them to predict how any logic gate or small circuit will respond. GeeksforGeeks: Boolean Algebra Basics
  3. Master Boolean algebra simplification - Simplifying Boolean expressions cuts down on extra gates and wiring, making your circuits faster and cheaper. Embrace identities and theorems to collapse complex formulas into neat, minimal forms. GeeksforGeeks: Minimization of Boolean Functions
  4. Use Karnaugh Maps (K-Maps) - K-Maps give you a visual grid to spot and eliminate redundant terms in Boolean expressions, especially handy when you're juggling up to four variables. It's like playing connect-the-dots to shrink your logic circuits. All About Circuits: Karnaugh Map Simplification
  5. Learn canonical forms - Standardizing expressions into Sum of Products (SOP) or Product of Sums (POS) makes comparing and simplifying functions a breeze. Canonical forms are your secret weapon for clear, error-resistant designs. Wikipedia: Canonical Normal Form
  6. Explore Boole's expansion theorem - Also known as the Shannon expansion, this theorem breaks any Boolean function into simpler pieces based on one variable at a time. It's a powerful trick for systematic circuit design and theoretical proofs. Wikipedia: Boole's Expansion Theorem
  7. Identify processor architecture components - Dive into the inner world of CPUs by studying the Arithmetic Logic Unit (ALU), control unit, registers, and data buses. Recognizing how these parts interplay demystifies instruction execution and performance. Wikipedia: CPU Architecture Overview
  8. Apply timing analysis - Timing diagrams reveal when signals change in sequential circuits, ensuring flip-flops and registers settle correctly before the next clock tick. Mastering setup and hold times will keep your designs glitch-free. Wikipedia: Timing Analysis Basics
  9. Understand memory hierarchy - From speedy caches through main RAM down to hard drives, each level balances cost, size, and speed. Grasping how data moves and is stored will help you optimize system performance. Wikipedia: Memory Hierarchy
  10. Design combinational circuits - Build adders, multiplexers, decoders, and more by combining logic gates to perform specific tasks. Hands-on practice cements your theory and keeps the circuits in your head switched on. Wikipedia: Combinational Logic Circuits
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